Supercomputing 2019

Denver, Colorado // Nov. 17 - 22
Supercomputers are crunching numbers to facilitate data analysis in social computing, genomics in healthcare, three-dimensional modeling in materials engineering, and more. And, the number of computational problems that are too large to solve on standard computers is growing rapidly causing high-performance computing (HPC) to become a necessity for industry and academia alike.
 
Georgia Tech researchers are stepping in to answer this growing need by leading HPC research from a variety of approaches and are preparing to present their latest findings in Denver, Colorado next week at the 2019 International Conference for High Performance Computing, Networking, Storage, and Analysis.
 
Also known as Supercomputing or SC19, the annual conference features leading research in the fields of HPC and exascale computing with an emphasis on real-world application.
 
This year, Georgia Tech’s presence boasts four papers, four workshops, two posters, and one Birds of a Feather discussion.
 
Two of the four papers, CARE: Compiler-Assisted Recovery from Soft Failures and GPU Acceleration of Extreme Scale Pseudo-Spectral Simulations of Turbulence Using Asynchronism are best student paper award finalists. The announcement naming the winner of the award will be made at the SC19 award ceremony on Nov. 21.

Explore more of Georgia Tech's SC19 research below:
 
 


Georgia Tech Demos

Booth #1809


 

Spatter Benchmark



Nov. 19
2:15 - 2:45 PM

 

The demo will cover the usage of Spatter on CPUs and GPUs. We will demonstrate how to explore the performance of the different memory access patterns built into Spatter including uniform stride and stencil-based access. We will look at how uniform stride access differs between CPUs and GPUs, and an interesting case where an older generation CPU is able to outperform more recent hardware. If there is time, we will look at a recent case where we used Spatter to determine the usefulness of doing a matrix transpose in the middle of an FFT. 

Atlantic Wave/SDX Project


Nov. 19
3 - 3:30 PM

 



AmLight-ExP and AtlanticWave-SDX offers the academic community 630Gbps of upstream bandwidth, network auto-recovery and dynamic provisioning, network programmability, network telemetry, integration with SENSE project's distributed orchestrator, and 100G DTNs.


The AtlanticWave-SDX (AW-SDX) (NSF Award #1451024) is a distributed, multi-domain, wide-area SDX platform that controls many network switches across the U.S. and South America. Southern Crossroads (SoX) in Atlanta, AMPATH in Miami, South America eXchange (SAX) in Fortaleza, SouthernLight in Sao Paulo, and AndesLight in Santiago are exchange points participating in the AtlanticWave-SDX project.

CEISMC's Work in Computer Science and Computing


Nov. 20
1:30 - 2 PM

 

Lizanne DeStefano serves as the Executive Director of the Center for Education Integrating Science, Mathematics & Computing (CEISMC). In her talk, she will highlight the role CEISMC plays in expanding and improving the nation’s capacity for STEM education and preparing citizens at all levels with the skills necessary for the STEM economy of the future. Her work spans from Kindergarten to professional education and takes care to ensure that this economy includes traditionally underserved and underrepresented groups in STEM.

WHPC Mentoring Program

Nov. 20
2 - 2:30 PM



Lorna Rivera serves as a Research Scientist at the Center for Education Integrating Science, Mathematics & Computing (CEISMC). As part of her commitment to the advancement of underrepresented groups in STEM, Ms. Rivera also serves as the Director of Research for Women in High Performance Computing (WHPC). In her talk, she will unveil the latest findings from WHPC’s inaugural mentoring program cohort and provide recommendations for others interested in replicating or participating in similar programs.


Best Student Paper Nominations


 


CARE: Compiler-Assisted Recovery from Soft Failures

Chao Chen, Greg Eisenhauer, Santosh Pande, Qiang Guan

Transient faults, temporary failures in processors or memories, are a growing concern for emerging extreme-scale HPC systems. New work at Georgia Tech focuses on automatic on-the-fly recovery from some faults in HPC applications. The key observation is that many HPC codes, e.g. stencil-based codes, require multiple integer operations to calculate array index values, and that a fault in this series of operations 1) is relatively easily detected because it likely causes a segmentation fault, and 2) could be recovered by simply replaying those address operations. In order to test this hypothesis, we created CARE, a light-weight compiler-assisted technique for on-the-fly repair of processes crashed by transient faults in the address path. The goal of CARE is to repair faulting processes so that they simply continue their executions instead of being terminated and restarted.  Care becomes active only when a corrupted address is dereferenced, and so imposes no run-time overhead in the case of fault-free execution.

Find out more about this work from 4 - 4:30 PM on Wednesday, Nov. 20 at Room No. 401-402-403-404

Kiran Ravikumar, David Appelhans, P.K. Yeung
 

A Georgia Tech and IBM team have developed a batched asynchronous algorithm using GPUs to perform large pseudo-spectral turbulence simulations out of CPU memory on dense node architectures like Summit. The code uses optimized strided copy kernels and MPI+OpenMP parallelism to scale to extreme problem sizes.

Find out more about this work from 11:30AM - 12 PM on Tuesday, Nov.19 at Room No. 405-406-407

WORKSHOPS

Georgia Tech’s involvement continues outside of published research with several faculty and students participating in several workshops, including:

Georgia Tech Papers

CARE: Compiler-Assisted Recovery from Soft Failures
Chao Chen, Greg Eisenhauer, Santosh Pande, Qiang Guan

Distributed Enhanced Suffix Arrays: Efficient Algorithms for Construction and Querying
Patrick Flick, Srinivas Aluru

GPU Acceleration of Extreme Scale Pseudo-Spectral Simulations of Turbulence Using Asynchronism
Kiran Ravikumar, David Appelhans, P.K. Yeung

Practical and Efficient Incremental Adaptive Routing for HyperX Networks
Nic McDonald, Mikhail Isaev, Adriana Flores, Al Davis, John Kim

AutoFFT: A Template-Based FFT Codes Auto-Generation Framework for ARM and X86 CPUs
*Zhihao Li, Haipeng Jia, Yunquan Zhang, Tun Chen, Liang Yuan, Luning, Cao, Xiao Wang
*Note: This paper is by a Georgia Tech visiting Ph.D. student but is not a Georgia Tech published item.
 

Looking Forward to SC20:


Supercomputing is making its way to Georgia Tech's home in the city of Atlanta! We will have some special events in store to celebrate our first homecoming. See below for the tip of the GT@SC20 iceberg. 
 


Supercomputing 2020 Student Cluster Competition



For Supercomputing 2020 we are assembling Team Phoenix, a Georgia Tech team for the Student Cluster Competition. If you are a hardware vendor who wants to partner with us please reach out to Will Powell (CSE Research Technologist) and Rich Vuduc (CHiPC Director and CSE Professor).

For more information about the Georgia Tech class we are using to train Team Phoenix, click here.

JOIN THE
CONVERSATION

Interested in more information or want to share your #SC19 experience and research? Contact School of Computational Science and Engineering Officer Kristen Perez at kristen.perez@cc.gatech.edu.
Use #SC19 and #CSE